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How Sand is Made into Silicon Wafers Step by Step: Silicon Wafer Preparation Process

What is a Silicon Wafer?

A silicon wafer is a thin slice of high purity crystal silicon that is generally used for semiconductors and integrated circuits (ICs). Because it's round, they also called it a "wafer". Silicon wafers are the building block of semiconductor chips. They're made from raw silicon through refining, purification, crystal growth and shaping.

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How is a Silicon Wafer Produced?

1. Raw Material Selection and Purification

Mining and Initial Processing: Silicon is primarily sourced from quartzite or sand. Mining material is first cleansed of contaminants.

High-Temperature Reduction: The quartzite is added to carbon and fired in an electric arc furnace. This binds silicon dioxide to metallurgical-grade silicon (MG-Si) that is about 98-99% pure.

Chemical Purification: Further treatment is done by chemical processes like Siemens which re-purifies MG-Si into high purity polysilicon (99.9999% purity) that is used in electronics.

Silicon Wafer Manufacturing Process

2. Crystal Growth

Czochralski (CZ) Process: In this common method, a seed crystal is submerged in molten silicon and gradually pulled upward to create one crystal silicon pellet.

Czochralski (CZ) Process of Inorganic Crystals

Float Zone (FZ) Process: The float zone process cleans silicon to ultra-purity standards by melting and rethawing in a controlled region along a rod. This results in extremely low oxygen content, suitable for advanced electronic applications.

3. Ingot Shaping and Cutting

Ingot Shaping: After making the silicon ingot, it is cylindrically cut and ground to a specific diameter.

Orientation Marking: An orientation flat or notch is placed on the ingot to signal crystal orientation (a critical feature of aligning wafers).

Slicing: Ingot is cut into tiny wafers with the wire saw. The thickness varies by use, but wafers for solar are usually thicker than integrated circuit wafers.

Silicon Ingot Shaping and Cutting

4. Wafer Lapping and Polishing

Lapping: The sliced wafers are often rough, so they undergo lapping, a grinding process that flattens the surface and removes saw marks.

Etching: Chemical etching gets off broken layers and contaminants from the surface.

Polishing: Chemical-mechanical polishing (CMP) brings the mirror-like finish needed for high-precision parts with flatness and surface smoothness required in semiconductor manufacturing.

Silicon Wafer Lapping and Polishing

5. Wafer Cleaning

The cleaned, polished wafers are chemically and ultrasonic cleaned from residues, particles and contaminants that might hinder performance. RCA cleaning is the general procedure (with hydrogen peroxide, ammonium hydroxide, and hydrochloric acid solutions).

Schematic diagram of the RCA cleaning system

6. Wafer Inspection and Testing

Thickness and Flatness Testing: The wafer thickness, flatness and bow are examined as per the specific criteria.

Surface Defect Inspection: Automated machines look at the surface for micro-defects (scratches, pits, or contamination).

Electrical Properties Testing: Electrical properties such as resistivity, conductivity and carrier lifetime are tested on the wafers to verify that they satisfy the requirements.

Silicon Wafer Inspection and Testing

7. Packaging and Shipment

After the wafers have been inspected, they are packaged in cleanroom environments for prevention of contamination and sent to customers for processing in microchip, photovoltaic or other high-tech production facilities.

Silicon Wafer Inspection and Testing

Every step of the silicon wafer production process is integral to ensuring wafers that meet rigorous electronics and semiconductor applications. Good execution leads to performance, durability, and stability in final solutions such as integrated circuits, solar cells, and microelectronics devices.

Key Indicators to Consider for Silicon Wafers

As a key semiconductor material, the quality and performance of silicon wafers directly determines the durability and performance of integrated circuits. So, there are a number of technical indicators one must consider when choosing and using silicon wafers.

Size: Most common wafer size is 6 inches (150 mm), 8 inches (200 mm) and 12 inches (300 mm). Bigger sizes enable the etching of more chips at a time which lowers per-unit cost and also reduces the chance that chips will have wafer defects which increases yield.

Purity: Silicon wafers have a very good purity, in most cases they must be at or higher than 99.999999999% (11N) to avoid internal imperfections and contamination by contaminants.

Crystal Process: This refers to crystal growth method (e.g., Czochralski or Float-Zone) crystal orientation (the<100>orientation) and dopant (boron, phosphorus).

Resistivity: Resistivity is one of the most important measurement to get an idea of electrical conductivity of silicon wafers, typically between 100 Ω·cm and 0.001 Ω·cm. Different applications can need different resistivity.

Thickness: Silicon wafers have to be as thick as mechanically possible to support their own weight without breaking, which should be between 0.5 and 0.8 mm.

Surface Flatness and Cleanliness: Surface flatness is defined as height difference below 10 nm and surface cleanliness defines particles that are within 10 nm of each other and are uncontaminated.

Defect Density: The crystal defect density has to be very low e.g., just one defect in 500 million silicon atoms.

Warp: The degree of wafer warp is another important indicator, which must be controlled within a certain range to ensure the precision of subsequent processing.

Oxygen and Carbon Content: The proportion of these impurities should be tightly monitored and oxygen and carbon concentrations should be maintained below predetermined atomic levels.

As the technology in semiconductors is improving, the performance of silicon wafers gets higher and higher, particularly with more sophisticated processes, where such signs need to be controlled. The result is a technical challenge to the silicon wafer business and only companies that have a high level of technology and expertise can make silicon wafers to the specifications.

References

  1. Friedrich, J. "Methods for bulk growth of inorganic crystals: crystal growth." (2016).
  2. Hecini, M., et al. "Recovery of cutting fluids used in polycrystalline silicon ingot slicing." Journal of Crystal Growth 453 (2016): 143-150.
  3. Gao, S., et al. "Grinding and lapping induced surface integrity of silicon wafers and its effect on chemical mechanical polishing." Applied Surface Science 599 (2022): 153982.
  4. Tomisaki, H., et al. "Cross-validation of competitive associative nets for stable temperature control of RCA cleaning solutions." Proc. of ICONIP2005 (2005): 166-170.

Our products and services are for research use only and cannot be used for any clinical purpose.

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