Step-by-Step Lab Protocol: Maximizing SU-8 Photoresist Adhesion on Silicon and Quartz Substrates

1. Overview & Process Mechanics

1.1 Purpose

This Standard Operating Procedure (SOP) outlines the standardized chemical and thermal protocol required to achieve maximum interfacial adhesion of SU-8 epoxy-based negative photoresist on silicon, quartz, and fused silica wafers. By following this protocol, researchers and process engineers can systematically prevent common photolithographic failures, such as film peeling, delamination during chemical development, micro-cracking caused by residual thermal stress, and pattern lifting during microfluidic device replication or electroforming.

1.2 Process Background & Adhesion Physics

SU-8 is an epoxy-based negative photoresist widely used in microelectromechanical systems (MEMS), high-aspect-ratio microstructures, photonics, and microfluidic master mold fabrication. Despite its mechanical strength and chemical stability, SU-8 suffers from two primary failure mechanisms:

1) Poor Interfacial Bonding to Hydrophilic Surfaces: Bare silicon and quartz wafers naturally adsorb ambient moisture, forming a hydrophilic surface layer rich in hydroxyl (-OH) groups. SU-8 is highly hydrophobic. When coated onto a hydrated substrate, interfacial surface energy mismatch prevents intimate chemical bonding, causing the photoresist film to lift or peel during immersion in PGMEA (SU-8 developer).

2) Thermal Expansion Mismatch and Internal Stress Build-up: SU-8 has a relatively high Coefficient of Thermal Expansion (CTE ≈ 52 x 10^-6/K), whereas silicon (CTE ≈ 2.6 x 10^-6/K) and fused silica (CTE ≈ 0.5 x 10^-6/K) expand significantly less under thermal load. Rapid temperature changes during Soft Bake (SB) or Post-Exposure Bake (PEB) induce high tensile stress across the interface, leading to film cracking, substrate warping, and spontaneous delamination.

2. Materials, Reagents, and Equipment

2.1 Reagents & Priming Agents

SU-8 Photoresist: SU-8 2000 or SU-8 3000 series (MicroChem / Kayaku Advanced Materials).
Adhesion Promoters:

HMDS (Hexamethyldisilazane): Semiconductor Grade (>99.9%).
Alternative Promoters: AP3000, MicroChem OmniCoat™, or dilute AP-3000 for difficult glass/quartz substrates.

SU-8 Developer: 1-Methoxy-2-propyl acetate (PGMEA, Semiconductor Grade).
Rinse/Clean Solvents: Anhydrous Isopropanol (IPA, >99.9%), Acetone (Semiconductor Grade), Piranha Solution (3:1 H₂SO₄:H₂O₂).

2.2 Substrate Compatibility & Selection

Substrate surface cleanliness and crystal orientation strongly influence initial resist wetting and long-term bond durability. Selecting uniform, high-grade substrates is essential for defect-free lithography.

Explore Alfa Chemistry's comprehensive lineup of high-purity wafers and substrates for advanced microfabrication:

Silicon Wafers: Prime-grade CZ/FZ single-crystal silicon wafers with custom crystal orientations (100, 111) and tight total thickness variation (TTV) for high-precision micro-machining.
Fused Silica Wafers: Highly transparent, low-fluorescence synthetic quartz substrates ideal for optical MEMS and UV-transparent microfluidics.
Silicon Carbide (SiC) Wafers: Chemically inert, ultra-hard 4H- and 6H-SiC substrates for extreme-environment sensors.
Silicon-on-Insulator (SOI) Wafers: High-precision engineered substrates with buried oxide (BOX) etch-stop layers for 3D microstructures.
Sapphire Wafers: Chemically resistant single-crystal Al2O3 substrates for high-durability optical devices.
Gallium Arsenide (GaAs) Wafers: Compound semiconductor substrates engineered for high-frequency microelectronics.
Indium Phosphide (InP) Wafers: Premium substrates for integrated photonics and optoelectronics.
Gallium Nitride (GaN) Wafers: High-power RF and optoelectronic semiconductor templates.
Composite Wafers: Multi-material engineered substrates for advanced thermal management.
CVD Diamond Substrates: Ultra-high thermal conductivity synthetic diamond substrates for extreme heat dissipation.

2.3 Required Hardware & Equipment

Programmable Hot Plates: Contact hot plates with digital PID temperature controllers, capable of programmable heating and cooling ramps (± 0.5 °C uniformity). Convection ovens are strongly discouraged for soft bake and PEB due to skinning effects.
HMDS Vacuum Vapor Prime Oven: Yield Engineering Systems (YES) or similar vacuum priming oven. (Manual spin-coating of liquid HMDS is acceptable if a vapor oven is unavailable, as detailed in Section 4).
Precision Spin Coater: Automated spin coater equipped with programmable acceleration profiles, closed bowl, and vacuum chuck.
UV Mask Aligner: Near-UV exposure system (365 nm i-line) with controlled irradiance (mW/cm²).

3. Health, Safety, and Personal Protective Equipment (PPE)

1) Chemical PPE:

Full splash goggles combined with a protective face shield.
Nitrile inner gloves with heavy-duty chemical butyl outer gloves.
Flame-retardant cleanroom coat or chemical splash apron.

2) Hazard Control:

HMDS Hazard: HMDS is flammable and moisture-sensitive. It reacts with moisture to release ammonia (NH₃). Handle strictly under an exhaust-ventilated chemical fume hood or sealed vacuum priming system.
SU-8 Hazard: Contains cyclopentanone or gamma-butyrolactone (GBL) solvents and mixed aryl sulfonium hexafluoroantimonate salts. Avoid skin contact and inhalation of organic vapors.

3) Piranha Cleaning Precaution: Piranha solution (3:1 H₂SO₄:H₂O₂) is an extremely strong oxidizer that reacts violently with organic substances. Always add hydrogen peroxide slowly to sulfuric acid. Never store piranha solution in sealed containers.

4. Standard Operating Procedure (SOP) Execution

STEP 1: SUBSTRATE PRE-CLEANING
Methods: Piranha Wash (3:1 H₂SO₄:H₂O₂) or Solvent Sonication

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STEP 2: HIGH-TEMPERATURE DEHYDRATION BAKE
Silicon: 180°C - 200°C for 30 - 60 minutes (Hot Plate / Oven)
Quartz: 200°C - 250°C for 60 minutes
Target: Desorb physical moisture and surface silanol-bound water

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STEP 3: SURFACE PRIMING & FUNCTIONALIZATION
Primary: Vapor Prime HMDS (150°C, 10 Torr vacuum cycle)
Alternate (Glass/Quartz): Spin-coat OmniCoat (3000 RPM, Bake 200°C)
Target: Form hydrophobic monolayer / adhesion interlayer

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STEP 4: PRECISION SPIN COATING OF SU-8
Spread: 500 RPM (100 RPM/s accel) for 10s
Spin: 1000 - 3000 RPM (300 RPM/s accel) for 30 - 45s
Edge Bead Removal (EBR): Manual wipe with PGMEA

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STEP 5: TWO-STAGE SOFT BAKE WITH RAMP CONTROL
Stage 1: Ramp to 65°C at 2°C/min -> Hold for 10 - 30 mins
Stage 2: Ramp to 95°C at 2°C/min -> Hold for 30 - 90 mins
Cooling: Controlled ramp down to < 40°C at ≤ 2°C/min

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STEP 6: UV EXPOSURE & POST-EXPOSURE BAKE
Exposure: 365 nm i-line (Dose per film thickness, PL360 filter)
PEB Stage 1: 65°C for 5 - 10 mins (Ramped)
PEB Stage 2: 95°C for 10 - 30 mins (Ramped)
Relaxation: Slow ramp-down to room temperature (1.5°C/min)

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STEP 7: DEVELOPMENT, HARD BAKE & INSPECTION
Development: Immersion in PGMEA with gentle agitation (5 - 15 mins)
Rinse: Fresh IPA wash (Verify absence of white epoxy precipitate)
Hard Bake (Optional): 150°C - 180°C ramped for glass cross-linking

5. Troubleshooting Guide & Process Control Matrix

Review the matrix below to identify and resolve common SU-8 processing defects:

Visual Defect / Process Failure	Primary Root Cause	Corrective Process Adjustment
Film Peeling / Delamination in Developer	Inadequate surface dehydration or missing/degraded HMDS layer.	Increase dehydration bake to 200 °C for 60 min. Re-verify HMDS vapor prime process.
Micro-Cracks Across SU-8 Features	Thermal shock caused by fast heating/cooling during Soft Bake or PEB.	Enforce strict ramp heating (2 °C/min) and slow cooling (1.5 °C/min) to room temp.
SU-8 Features Lifting on Quartz/Glass	Poor chemical affinity of HMDS on SiO₂/quartz matrices.	Replace HMDS with OmniCoat™ or AP3000 adhesion promoter. Bake OmniCoat at 200°C.
Bubbling or Void Formation in Film	Residual solvent trapped under cross-linked surface skin.	Increase 65°C soft bake hold time to allow gradual solvent evaporation prior to 95°C stage.
Wrinkled or Wavy Surface Morphology	Over-exposure or un-filtered deep-UV (<350nm) radiation.	Use a PL-360 UV long-pass filter. Reduce exposure dose by 15–20%.

Frequently Asked Questions (FAQ)

Why does HMDS fail to promote SU-8 adhesion on quartz and glass substrates?

HMDS is highly effective for thin, positive photoresists on silicon because it converts hydrophilic hydroxyl (-OH) groups into hydrophobic siloxane bonds. However, quartz and glass substrates have a much higher density of surface silanol groups and lower thermal conductivity than silicon. Furthermore, thick SU-8 films (>50 µm) generate significantly higher shear stress at the interface during cooling. For glass and quartz, specialized adhesion interlayers like MicroChem OmniCoat™ or AP3000 are far more effective than HMDS because they form covalent chemical bonds with both the glass substrate and the epoxy matrix.

Is a dehydration bake necessary if the wafer was stored in a cleanroom desiccator?

Yes, absolutely. Wafers stored in cleanroom desiccators still adsorb a molecular layer of atmospheric water within minutes of exposure to ambient cleanroom air (even at 30 - 40% relative humidity). A physical drying bake at 100 °C only removes physisorbed water, which quickly re-adsorbs upon cooling. A high-temperature dehydration bake at 180 °C - 200 °C for at least 30 minutes is mandatory to desorb chemisorbed water molecules and silanol-bound surface hydration prior to resist coating.

What is the main cause of fine micro-cracks appearing in SU-8 structures after development?

Micro-cracking (stress crazing) is primarily caused by thermal shock resulting from excessive heating or cooling rates during Soft Bake (SB) or Post-Exposure Bake (PEB). Because SU-8 has a Coefficient of Thermal Expansion (CTE ≈ 52 x 10^-6/K) that is roughly twenty times higher than silicon (CTE} ≈ 2.6 x 10^-6/K), sudden temperature transitions induce extreme internal tensile strain. Always enforce a controlled heating and cooling ramp rate of ≤ 2 °C/min and allow the wafer to cool below 40 °C before moving it.

How do I know if my SU-8 film is sufficiently soft-baked before UV exposure?

An under-baked film contains residual solvent, which leads to poor resolution, mask sticking, and severe post-development cracking. An over-baked film suffers from thermal cross-linking, reducing sensitivity and causing adhesion failure. To verify optimal soft bake:

Allow the wafer to cool to room temperature.
Gently touch an non-critical edge of the resist film with clean Teflon tweezers. The film should be hard, non-tacky, and show no optical indentation under inspection lighting.
If the film feels sticky or retains an impression, return it to the hot plate for additional 95 °C ramped baking.

Can I re-process or strip an SU-8 film if adhesion fails or lithography is misaligned?

Un-exposed (uncross-linked) SU-8 can be easily dissolved using Acetone or PGMEA. However, fully cross-linked SU-8 is extremely resistant to solvents and acids. To strip cross-linked SU-8:

Use specialized commercial strippers such as OmniCoat Remover (PG Remover) or Microposit Remover 1165 heated to 80 °C with ultrasonic agitation for 1–2 hours.
Alternatively, perform an Oxygen Plasma Ashing treatment or submerge the substrate in hot Piranha solution (3:1 H₂SO₄:H₂O₂ at 120 °C). Note that prolonged Piranha exposure can etch underlying metallic layers on sensitive devices.